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Sr Analog Engineer

Celeno

Celeno

Suzhou, Jiangsu, China
Posted on Aug 24, 2022

1) Familiar with semiconductor process and device structure
2) More than 8 years of analog circuit design experience ( Bandgap, OP-AMP, LDO, AD/DA, DC/DC etc)
3) Experienced at Virtuoso, Spectre tools
4) high level analog layout skill
5) Be practical and conscientious and have a sense of responsibility.
6) Able to communicate and collaborate well with other team members.