Sr Staff Digital Engineer
Celeno
Ho Chi Minh City, Vietnam
Posted on Friday, April 7, 2023
• Lead RISC-V CPUSS Design for General Purpose MCU
• Join the full flow of RISC-V CPUSS Design:
- Make Target & Detail Specifications from Product Requirement Document
- Implement the design (RTL Coding)
- Define block-level test environments for CPU-SS
- Create test plans for unit-level verification.
- Design and implement test benches and verification environment.
- Generate tests, debug failures, and evaluate coverage of the design.
- Run physical synthesis on module level.
- Perform Technology verification (HLDRC, STAchk, DFTchk, ...)