• Lead RISC-V CPUSS Design for General Purpose MCU • Join the full flow of RISC-V CPUSS Design: - Make Target &amp; Detail Specifications from Product Requirement Document - Implement the design (RTL Coding) - Define block-level test environments for CPU-SS - Create test plans for unit-level verification. - Design and implement test benches and verification environment. - Generate tests, debug failures, and evaluate coverage of the design. - Run physical synthesis on module level. - Perform Technology verification (HLDRC, STAchk, DFTchk, ...)

Ho Chi Minh City, Vietnam

Celeno Communications is a fabless semiconductor company developing components and subsystems for high performance carrier-class WiFi systems and networks. Celeno's breakthrough technology enables a new vision in home wireless networking by delivering high definition entertaiment and multimedia content throughout the home. Celeno's components provide the boost in throughput, coverage, and QoS necessary to deliver multiple HDTV, SDTV, VoIP and Data "triple play" services over the home network. Celeno's core competency is based on smart antenna technology, spatial radio switching combined with adaptive channel coding, dynamic time-space scheduling, and multimedia QoS optimization. The technology targets applications requiring the highest level of system performance (capacity and reach), consistent carrier-class multimedia QoS, and tight security protection.

Ra'anana, Israel

Celeno

Sr Staff Digital Engineer

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