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Lead/Principal Digital Design Engineer

Celeno

Celeno

This job is no longer accepting applications

See open jobs at Celeno.
Design
Edinburgh, UK
Posted on Saturday, July 1, 2023

 

We are looking for an experienced Digital Design Engineer to take on the Lead / Principal role in running design projects for the Audio & Power Management driver products. The individual will play a key role in interpreting Requirements Specifications to develop digital designs from the block level to top-level system; Design verification and developing advanced verification methodologies; RTL Design for Low Power products and supporting and mentoring Junior engineers. 

 

 

Job Summary:

 

  • Ensuring Digital development process achieves budget, schedule and project deliverable goals
  • Design of optimized digital blocks meeting functional, cost and low power constraints and ensure spec compliance
  • Ownership of the Digital Design process for projects to conform to Dialog’s Design process
  • Support TCL scripts and design constraints to perform synthesis, DFT insertion and static timing analysis
  • Support DFT strategy and implementation and verify test case development
  • Verification planning, feature extraction and verification test case development.
  • Interface with P&R for Digital hand-off and post layout verification
  • Develop test vectors for production test
  • Driving and ensuring Design review process is implemented
  • Perform physical silicon device evaluation where necessary.
  • Document errata to support necessary device modifications.
  • Develop work-around solutions where necessary to overcome device errata.

 

 

Your Profile:

 

  • Typically, >10 years digital design experience in one of the following areas: wireless handheld, specifically audio and power management; consumer displays; automotive body electronics
  • Degree level qualification in Electronics engineering or a related discipline typically required.
  • Deep understanding of advanced verification methodologies (e.g. OVM, ABV)
  • Fluent in either Verilog or VHDL RTL coding and ASIC design methodology.
  • Proven ability to optimize and develop design architecture from chip inception through to compliant netlist
  • Competence in developing design constraints and Synthesis scripts (Synopsys DC)
  • Proficiency in developing block and top-level Timing constraints for STA and P&R handoff
  • Track record contributing to a successful team environment with ability to support junior staff members.
  • Concise and proactive communication skills within a multi-site and multi-cultural environment.

 

Renesas Electronics Corporation (TSE: 6723) empowers a safer, smarter and more sustainable future where technology helps make our lives easier. A leading global provider of microcontrollers, Renesas combines our expertise in embedded processing, analog, power and connectivity to deliver complete semiconductor solutions. These Winning Combinations accelerate time to market for automotive, industrial, infrastructure and IoT applications, enabling billions of connected, intelligent devices that enhance the way people work and live. Learn more at renesas.com. Follow us on LinkedIn, Facebook, Twitter, YouTube, and Instagram.

 

Renesas respects all types of diversity and values, and actively works to improve our work environment and foster a corporate culture that accepts and is inclusive of one another. We believe our commitment to diversity and inclusion, and our initiatives are the source of innovative products and services that support our sustainable business growth. For more information, please read through our Diversity & Inclusion Statement.

This job is no longer accepting applications

See open jobs at Celeno.