Senior Design Verification Engineer
Job Purpose and Dimensions:
The purpose of this job is to lead a team of engineers in the tasks of guaranteeing specification compliance of digital or mixed signal design by means of advanced verification methodologies and concepts. It involves definition, deployment and improvement of state-of-the-art verification methodologies.
- Lead digital verification of mixed signal ICs or sub-systems.
- Provide a technical interface between other CMS teams and any local contract DV resources.
- Develop verification strategy for digital and mixed signal IPs and implement the verification IP following object-oriented programming principles and methodologies including UVM
- Verification planning, maintenance, feature extraction, verification tests, coverage and checker development.
- Develop efficient, reusable state-of-the-art verification environments and testbench structures.
- Initiate and participate in review meetings with design and verification engineers.
- Able to debug the RTL for design intent and interface with cross-functional teams and collaboration in all verification related activities.
- Mentor verification team and provide technical support for verification activities.
Knowledge, Skills and Experience:
- The ideal candidate has an experience of 5+ years in advanced verification methodologies, owning the verification of complex digital and mixed signal designs
- System Verilog for verification using advanced verification methodologies (preferably UVM or similar such as Specman-e, OVM, SystemC, etc.)
- Assertion based verification and Formal verification
- Expert in constrained random verification and metric driven verification
- Expert in simulation and regressions tools e.g. Cadence Incisive, vManager, IMC
- Familiar with either Verilog or VHDL RTL coding and ASIC design methodology
- Familiar with behavioral modelling of analog blocks
- Good knowledge of UNIX shell scripting, Perl and TCL scripting
- Proven experience in writing verification plans and test bench development, simulation and debugging.
Key Performance Measures:
- Deliver verification work in the agreed time scales as set by program schedule for all assigned tasks.
- Document and log all the verification work.
- Verification strategy and concept in place in an early phase of the project.
- Ensure specification compliance by having required verification metrics in place.
- Verification concept and approaches according to corporate rules and guidelines.
- Concise and proactive communication skills within a multi-site and multi-cultural environment
- Ability to persuade and influence others based on technical facts
- Ability to interact with customers
- Ability to successfully work with 3rd party contractors
- Takes responsibility for solutions and makes them happen, self-motivated
- Looks for continuous improvement in own and Dialog work practices
- Good analytical and problem-solving skills
Degree in electrical engineering, electronics, computer engineering, computer science, or equivalent