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SOC,MCU test methodology development engineer

Celeno

Celeno

This job is no longer accepting applications

See open jobs at Celeno.
Tokyo, Japan
Posted on Monday, July 31, 2023

Job Type: Permanent  - Full Time 

Remote Work Available: Yes 

 

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of the electronics you rely on every day; you may not see our products, but they are all around you.

 

Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world.

 

[Background of Recruitment]

In order to secure a competitive advantage in the fiercely competitive field of automotive SOC and MCU products, advanced technology

and innovative approaches are required even in the testing. Therefore strengthening the engineering team is essential.

This position provides an opportunity to play a strategic role in testing new products, contributing to the business while also fostering

personal growth.

 

[Responsibilities]

To standardize testing (prototype evaluation, mass production testing) for automotive SOC and MCU product series,

①Formulate test policies to achieve test quality, test cost, and development TAT targets

②Development of DFT specifications and tester pattern specifications based on the test policy and creation of guide documents.

 

[Required Skills and Work Experience]

[Must]

  - Practical experience in semiconductor design and/or testing fields.

  - Communication skills for collaborative teamwork

[Want]

  - Experience in developing test methodologies and creating test plans

  - Practical experience in DFT design

  - Practical experience in HDL language e.g. Verilog or VHDL

  - Knowledge and interest in test methodologies and EDA tools

 

[Required Language Skills]

[English]Can understand conversation (TOEIC 500)

[Japanese]Can have daily conversation

This job is no longer accepting applications

See open jobs at Celeno.