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SoC Timing Design Engineer/Leader



This job is no longer accepting applications

See open jobs at Celeno.
Tokyo, Japan
Posted on Tuesday, August 1, 2023

Job Type: Permanent  - Full Time 

Remote Work Available: Yes 


Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of the electronics you rely on every day; you may not see our products, but they are all around you.


Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world.


[Background of Recruitment]

High performance SoC are key parts to realize automobile's electric and high performance which are so called CASE (Connected, Automated, Shared, Electric).  

SoC are becoming more larger and complex to meet the demand of more function and high performance. Cost competition is also a key.

In the timing design viewpoint, developing a large scale complex SoC is required, and we want to recruit an innovative engineer.

We're waiting for a engineer who can work with global mindset, since we're co-working with a design center in Vietnam (language: English)



SoC Timing Design Engineer or Leader. Timing design technology development, and product development by Static Timing Analysis and Timing Constraint design.

- Static Timing Analysis:Timing design by using EDA vendor's EDA tool

- Timing constraint design:Timing constraint design by using EDA vendor's tool and Renesas tool.

  Both Static Timing Analysis and Timing Constraint design case will be co-working with oversea design center.


[Required Skills and Work Experience]


  - Timing design  (Static Timing Analysis,  Timing Constraint debugging )experience: over 5 years

  - English communication skill


  - Hardware language (ex. Verilog-HDL)

  - Experience of using English in business


[Required Language Skills]

[English]Can understand conversation (TOEIC 500)

[Japanese]Business level

This job is no longer accepting applications

See open jobs at Celeno.