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Staff Validation Engineer

Celeno

Celeno

Other Engineering
Chandler, AZ, USA
Posted on Wednesday, August 9, 2023

Renesas is looking for a Mixed-Signal Verification Engineer to join our team of engineers that support the development and release of several power management ICs for the portable market. Come join a team that demonstrates that a potential product operates as specified and help to find issues and mitigate them before the product is manufactured.

Some of the requirements for this position include:

  • Experience with creating and/or using real-numbered models in modeling languages such as SystemVerilog
  • Familiar with EDA design tools and Cadence design environment
  • Good communication, organizational, and teamwork skills with the ability to take ownership and help to ensure that a task is complete on time
  • Developing a list of tests from the datasheet to determine chip coverage
  • Creation and maintenance of testbench and design files for simulation regression runs
  • Delegation of tests to a group of verification engineers and assist with troubleshooting
  • Provide technical assistance and mentoring to others as needed
  • BS or MS in Electrical Engineering or equivalent
  • Familiarity with scripting language like Makefile, Perl, Tcl or Python
  • Experience in UVM based verification flow is a plus