IC Design Engineer_New Hired_2024-7
Celeno
Responsibility:
1) Engaged in electric design and verification related to SOC chips.
2) Do schematic design and artwork design according to the required specification.
3) Generate S-Paramter Model from artwork design, and carry out SI/PI simulations and analysis.
4) Improve design based on SI/PI results.
Qualification:
1. Excellent academic performance and in-depth understanding of study subjects
2. Have a solid foundation in digital circuit and analog circuit. Have studied courses related to the high speed signals.
3. Have experience to use EDA tools.
4. Have a positive willingness to learn. Have strong learning ability and hard-working spirit.
5. Be conscientious and responsible and have good communication awareness.