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Principal Verification Engineer



This job is no longer accepting applications

See open jobs at Celeno.
Edinburgh, UK
Posted on Tuesday, November 28, 2023

Job Purpose:

The purpose of this job is to guarantee specification compliance of digital or mixed signal design by means of advanced verification methodologies and concepts. It involves definition, deployment and improvement of state-of-the-art verification methodologies.

Principal Accountabilities:

  1. Verification planning, maintenance, feature extraction, verification test case and checker development
  2. Develop efficient, reusable state-of-the-art verification environments and testbench structures
  3. Develop verification strategy for digital and mixed signal IPs and implement the verification IP following object-oriented programming principles and methodologies including UVM
  4. Initiate and participate in review meetings with design and verification engineers
  5. Lead digital verification of mixed signal ICs or sub-systems
  6. Work closely with the Analog Mixed Signal (AMS) verification and analog design team
  7. Mentor junior engineers in the team

Key Performance Measures:

  1. Deliver verification work in the agreed time scales as set by program schedule for all assigned tasks
  2. Document and log all the verification work
  3. Verification strategy and concept in place in an early phase of the project
  4. Ensured specification compliance by having required verification metrics in place
  5. Verification concept and approaches according to corporate rules and guidelines

Knowledge, Skills and Experience:


  • The ideal candidate has an experience of 5-10 years in advanced verification methodologies, owning the verification of complex digital and mixed signal designs
  • SystemVerilog for verification using advanced verification methodologies (preferably OVM/UVM or similar such as Specman-e, SystemC, etc.)
  • Assertion based verification and Formal verification
  • Expert in constrained random verification and metric driven verification
  • Expert in simulation and regressions tools e.g. Cadence Incisive, vManager, IMC
  • Familiar with either Verilog or VHDL RTL coding and ASIC design methodology
  • Familiar with behavioral modelling of analog blocks


  • Concise and proactive communication skills within a multi-site and multi-cultural environment
  • Ability to persuade and influence others based on technical facts
  • Takes responsibility for solutions and makes them happen, self-motivated
  • Looks for continuous improvement in own and Dialog work practices


Degree in electrical engineering, electronics, computer engineering, computer science, or equivalent

Key Relationships:

Digital design team, analog design team and AMS verification team, project management

Organisation Chart:

Reporting to: Digital Group Manager / Team Lead

Direct reports: none

Renesas Electronics Corporation (TSE: 6723) empowers a safer, smarter and more sustainable future where technology helps make our lives easier. A leading global provider of microcontrollers, Renesas combines our expertise in embedded processing, analog, power and connectivity to deliver complete semiconductor solutions. These Winning Combinations accelerate time to market for automotive, industrial, infrastructure and IoT applications, enabling billions of connected, intelligent devices that enhance the way people work and live. Learn more at renesas.com. Follow us on LinkedIn, Facebook, Twitter, YouTube, and Instagram.

Renesas’ mission, To Make Our Lives Easier, is underpinned by our company culture, TAGIE. TAGIE stands for Transparent, Agile, Global, Innovative and Entrepreneurial. Our goal is to embed this unique culture in everything we do to succeed as a company and create trust with our diverse colleagues, customers and stakeholders.

We are committed to creating a diverse culture where everyone is included and feels a sense of belonging. For more information, please read our Diversity & Inclusion Statement.

This job is no longer accepting applications

See open jobs at Celeno.