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Digital Engineer

Celeno

Celeno

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Software Engineering
Ho Chi Minh City, Vietnam
Posted on Friday, February 2, 2024

- Have A little knowledge about Bus structure, CPU architecture
- Know about some script language (python, csh, shell, perl, ...) is better.
- Using C/C++ to create test pattern.
- Ussing Verilog/System Verilog to create testbench check.
- Know about UVM environment to conduct verification simulation
- Know about Bus Protocol (ex : APB, AHB, AXI, ...) and Using AMBassador tool generate RTL Bus

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